POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER http://hdl.handle.net/123456789/10708 Sun, 05 Apr 2026 20:16:10 GMT 2026-04-05T20:16:10Z POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER http://hdl.handle.net/123456789/10726 POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER PONNU RENJI, CAROL Wed, 30 Mar 2022 00:00:00 GMT http://hdl.handle.net/123456789/10726 2022-03-30T00:00:00Z