<?xml version="1.0" encoding="UTF-8"?>
<rdf:RDF xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns="http://purl.org/rss/1.0/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">
<channel rdf:about="http://hdl.handle.net/123456789/7028">
<title>EE204 DIGITAL ELECTRONICS AND LOGIC DESIGN</title>
<link>http://hdl.handle.net/123456789/7028</link>
<description/>
<items>
<rdf:Seq>
<rdf:li rdf:resource="http://hdl.handle.net/123456789/11337"/>
<rdf:li rdf:resource="http://hdl.handle.net/123456789/8792"/>
<rdf:li rdf:resource="http://hdl.handle.net/123456789/8696"/>
<rdf:li rdf:resource="http://hdl.handle.net/123456789/7839"/>
</rdf:Seq>
</items>
<dc:date>2026-04-06T00:52:23Z</dc:date>
</channel>
<item rdf:about="http://hdl.handle.net/123456789/11337">
<title>DIGITAL ELECTRONICS AND LOGIC DESIGN (EE)</title>
<link>http://hdl.handle.net/123456789/11337</link>
<description>DIGITAL ELECTRONICS AND LOGIC DESIGN (EE)
</description>
<dc:date>2023-03-02T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/123456789/8792">
<title>SEP 2020</title>
<link>http://hdl.handle.net/123456789/8792</link>
<description>SEP 2020
</description>
<dc:date>2020-09-04T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/123456789/8696">
<title>DES 2019</title>
<link>http://hdl.handle.net/123456789/8696</link>
<description>DES 2019
</description>
<dc:date>2019-12-03T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/123456789/7839">
<title>MAY 2019</title>
<link>http://hdl.handle.net/123456789/7839</link>
<description>MAY 2019
</description>
<dc:date>2019-05-10T00:00:00Z</dc:date>
</item>
</rdf:RDF>
