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<title>LOW POWER VLSI DESIGN</title>
<link href="http://hdl.handle.net/123456789/11305" rel="alternate"/>
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<id>http://hdl.handle.net/123456789/11305</id>
<updated>2026-04-05T19:11:10Z</updated>
<dc:date>2026-04-05T19:11:10Z</dc:date>
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<title>LOW POWER VLSI</title>
<link href="http://hdl.handle.net/123456789/11309" rel="alternate"/>
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<name/>
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<id>http://hdl.handle.net/123456789/11309</id>
<updated>2023-05-10T21:30:15Z</updated>
<published>2023-03-02T00:00:00Z</published>
<summary type="text">LOW POWER VLSI
</summary>
<dc:date>2023-03-02T00:00:00Z</dc:date>
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<entry>
<title>LOW POWER VLSI DESIGN</title>
<link href="http://hdl.handle.net/123456789/11307" rel="alternate"/>
<author>
<name/>
</author>
<id>http://hdl.handle.net/123456789/11307</id>
<updated>2023-05-10T21:30:14Z</updated>
<published>2023-02-02T00:00:00Z</published>
<summary type="text">LOW POWER VLSI DESIGN
</summary>
<dc:date>2023-02-02T00:00:00Z</dc:date>
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