POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER
http://hdl.handle.net/123456789/10708
2026-04-05T21:47:48Z
2026-04-05T21:47:48Z
POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER
PONNU RENJI, CAROL
http://hdl.handle.net/123456789/10726
2023-01-31T21:30:08Z
2022-03-30T00:00:00Z
POWER GATED ECRL ADIABATIC LOGIC BASED OPTIMIZED TWO-INPUT MULTIPLEXER
PONNU RENJI, CAROL
2022-03-30T00:00:00Z