<?xml version="1.0" encoding="UTF-8"?>
<feed xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns="http://www.w3.org/2005/Atom">
<title>DESIGN AND VERIFICATION OF ‘N’ POINT FFT AND IFFT USING VERILOG</title>
<link href="http://hdl.handle.net/123456789/10012" rel="alternate"/>
<subtitle/>
<id>http://hdl.handle.net/123456789/10012</id>
<updated>2026-04-05T18:41:30Z</updated>
<dc:date>2026-04-05T18:41:30Z</dc:date>
<entry>
<title>DESIGN AND VERIFICATION OF ‘N’ POINT FFT AND IFFT USING VERILOG</title>
<link href="http://hdl.handle.net/123456789/10041" rel="alternate"/>
<author>
<name>j, ADITHYAN</name>
</author>
<author>
<name>P, ABHIRAM</name>
</author>
<author>
<name>PAUL, ASHER</name>
</author>
<author>
<name>V S, SRUTHY</name>
</author>
<id>http://hdl.handle.net/123456789/10041</id>
<updated>2022-06-28T21:30:15Z</updated>
<published>2021-07-30T00:00:00Z</published>
<summary type="text">DESIGN AND VERIFICATION OF ‘N’ POINT FFT AND IFFT USING VERILOG
j, ADITHYAN; P, ABHIRAM; PAUL, ASHER; V S, SRUTHY
</summary>
<dc:date>2021-07-30T00:00:00Z</dc:date>
</entry>
</feed>
